| config.h | config.h | |||
|---|---|---|---|---|
| skipping to change at line 13 | skipping to change at line 13 | |||
| #define PCI_HAVE_PM_LINUX_SYSFS | #define PCI_HAVE_PM_LINUX_SYSFS | |||
| #define PCI_HAVE_PM_LINUX_PROC | #define PCI_HAVE_PM_LINUX_PROC | |||
| #define PCI_HAVE_LINUX_BYTEORDER_H | #define PCI_HAVE_LINUX_BYTEORDER_H | |||
| #define PCI_PATH_PROC_BUS_PCI "/proc/bus/pci" | #define PCI_PATH_PROC_BUS_PCI "/proc/bus/pci" | |||
| #define PCI_PATH_SYS_BUS_PCI "/sys/bus/pci" | #define PCI_PATH_SYS_BUS_PCI "/sys/bus/pci" | |||
| #define PCI_HAVE_PM_INTEL_CONF | #define PCI_HAVE_PM_INTEL_CONF | |||
| #define PCI_HAVE_64BIT_ADDRESS | #define PCI_HAVE_64BIT_ADDRESS | |||
| #define PCI_HAVE_PM_DUMP | #define PCI_HAVE_PM_DUMP | |||
| #define PCI_COMPRESSED_IDS | #define PCI_COMPRESSED_IDS | |||
| #define PCI_IDS "pci.ids.gz" | #define PCI_IDS "pci.ids.gz" | |||
| #define PCI_PATH_IDS_DIR "/home/andrey/upstream-tracker/testing/pciutils/2. | #define PCI_PATH_IDS_DIR "/home/andrey/upstream-tracker/testing/pciutils/2. | |||
| 2.7/share" | 2.8/share" | |||
| #define PCILIB_VERSION "2.2.7" | #define PCILIB_VERSION "2.2.8" | |||
| End of changes. 1 change blocks. | ||||
| 0 lines changed or deleted | 0 lines changed or added | |||
| header.h | header.h | |||
|---|---|---|---|---|
| skipping to change at line 197 | skipping to change at line 197 | |||
| #define PCI_CAP_ID_AGP 0x02 /* Accelerated Graphics Port */ | #define PCI_CAP_ID_AGP 0x02 /* Accelerated Graphics Port */ | |||
| #define PCI_CAP_ID_VPD 0x03 /* Vital Product Data */ | #define PCI_CAP_ID_VPD 0x03 /* Vital Product Data */ | |||
| #define PCI_CAP_ID_SLOTID 0x04 /* Slot Identification */ | #define PCI_CAP_ID_SLOTID 0x04 /* Slot Identification */ | |||
| #define PCI_CAP_ID_MSI 0x05 /* Message Signalled Interru pts */ | #define PCI_CAP_ID_MSI 0x05 /* Message Signalled Interru pts */ | |||
| #define PCI_CAP_ID_CHSWP 0x06 /* CompactPCI HotSwap */ | #define PCI_CAP_ID_CHSWP 0x06 /* CompactPCI HotSwap */ | |||
| #define PCI_CAP_ID_PCIX 0x07 /* PCI-X */ | #define PCI_CAP_ID_PCIX 0x07 /* PCI-X */ | |||
| #define PCI_CAP_ID_HT 0x08 /* HyperTransport */ | #define PCI_CAP_ID_HT 0x08 /* HyperTransport */ | |||
| #define PCI_CAP_ID_VNDR 0x09 /* Vendor specific */ | #define PCI_CAP_ID_VNDR 0x09 /* Vendor specific */ | |||
| #define PCI_CAP_ID_DBG 0x0A /* Debug port */ | #define PCI_CAP_ID_DBG 0x0A /* Debug port */ | |||
| #define PCI_CAP_ID_CCRC 0x0B /* CompactPCI Central Resource Contr ol */ | #define PCI_CAP_ID_CCRC 0x0B /* CompactPCI Central Resource Contr ol */ | |||
| #define PCI_CAP_ID_HOTPLUG 0x0C /* PCI hot-plug */ | ||||
| #define PCI_CAP_ID_SSVID 0x0D /* Bridge subsystem vendor/device ID */ | #define PCI_CAP_ID_SSVID 0x0D /* Bridge subsystem vendor/device ID */ | |||
| #define PCI_CAP_ID_AGP3 0x0E /* AGP 8x */ | #define PCI_CAP_ID_AGP3 0x0E /* AGP 8x */ | |||
| #define PCI_CAP_ID_SECURE 0x0F /* Secure device (?) */ | ||||
| #define PCI_CAP_ID_EXP 0x10 /* PCI Express */ | #define PCI_CAP_ID_EXP 0x10 /* PCI Express */ | |||
| #define PCI_CAP_ID_MSIX 0x11 /* MSI-X */ | #define PCI_CAP_ID_MSIX 0x11 /* MSI-X */ | |||
| #define PCI_CAP_ID_SATA 0x12 /* Serial-ATA HBA */ | ||||
| #define PCI_CAP_ID_AF 0x13 /* Advanced features of PCI devices | ||||
| integrated in PCIe root cplx */ | ||||
| #define PCI_CAP_LIST_NEXT 1 /* Next capability in the list */ | #define PCI_CAP_LIST_NEXT 1 /* Next capability in the list */ | |||
| #define PCI_CAP_FLAGS 2 /* Capability defined flags (16 bits ) */ | #define PCI_CAP_FLAGS 2 /* Capability defined flags (16 bits ) */ | |||
| #define PCI_CAP_SIZEOF 4 | #define PCI_CAP_SIZEOF 4 | |||
| /* Capabilities residing in the PCI Express extended configuration space */ | /* Capabilities residing in the PCI Express extended configuration space */ | |||
| #define PCI_EXT_CAP_ID_AER 0x01 /* Advanced Error Reporting */ | #define PCI_EXT_CAP_ID_AER 0x01 /* Advanced Error Reporting */ | |||
| #define PCI_EXT_CAP_ID_VC 0x02 /* Virtual Channel */ | #define PCI_EXT_CAP_ID_VC 0x02 /* Virtual Channel */ | |||
| #define PCI_EXT_CAP_ID_DSN 0x03 /* Device Serial Number */ | #define PCI_EXT_CAP_ID_DSN 0x03 /* Device Serial Number */ | |||
| #define PCI_EXT_CAP_ID_PB 0x04 /* Power Budgeting */ | #define PCI_EXT_CAP_ID_PB 0x04 /* Power Budgeting */ | |||
| End of changes. 3 change blocks. | ||||
| 0 lines changed or deleted | 5 lines changed or added | |||